Computer Architecture & Assembly Language Important Questions | BCA 3rd semester CCSU 

Here are accurate and concise answers tailored for your CCSU examination purpose:

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1. Define and explain Cache Memory.

Cache memory is a small, high-speed storage located between the CPU and the main memory. It stores frequently accessed data and instructions to speed up processing. Cache reduces the time taken to access data from the main memory, thus improving system performance.

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2. Write about Flag Register in 8085.

The Flag Register in the 8085 microprocessor is an 8-bit register used to indicate the status of the processor after arithmetic and logical operations. It consists of 5 active flags:

• Sign (S): Indicates the sign of the result.
• Zero (Z): Set if the result is zero.
• Auxiliary Carry (AC): Used in BCD operations.
• Parity (P): Set if the number of 1s in the result is even.
• Carry (CY): Indicates a carry or borrow in arithmetic operations.

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3. Write a note on Computer Registers.

Registers are small, fast storage units within the CPU used to temporarily hold data, instructions, or addresses. Types include:

• Accumulator (AC): Stores intermediate arithmetic and logic results.
• Program Counter (PC): Holds the address of the next instruction.
• Instruction Register (IR): Holds the current instruction.
• General-Purpose Registers: Used for various operations (e.g., AX, BX in x86).

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4. What is Asynchronous Data Transfer?

In Asynchronous Data Transfer, data is transferred without using a common clock signal between the sender and receiver. Handshaking signals like "Ready" and "Acknowledge" ensure proper synchronization.

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5. Write an Assembly Language Program to Add Two Numbers.

MOV A, 05H  ; Load first number into A  
ADD B       ; Add second number in register B  
MOV C, A    ; Store result in register C  
HLT         ; Halt the program

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6. Differentiate Between Isolated I/O and Memory-Mapped I/O.

Feature	Isolated I/O	Memory-Mapped I/O
Address Space	Separate I/O address space	Shared with memory space
Instructions Used	IN, OUT	Memory instructions (MOV)
Speed	Slower	Faster

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7. Convert into Reverse Polish Notation: A + B + C.

RPN: ABC++

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8. Differentiate Between Hardwired and Micro-Programmed Controls.

Feature	Hardwired Control	Micro-Programmed Control
Design	Fixed logic circuits	Control memory for instructions
Flexibility	Difficult to modify	Easy to modify
Speed	Faster	Slower

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9. What are Macros?

A macro is a sequence of instructions grouped together as a single unit. It allows the use of repetitive code by defining it once and using it multiple times.

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10. What is the Full Form of RISC?

RISC: Reduced Instruction Set Computer.

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11. Define Interrupt. Explain its Various Types.

An Interrupt is a signal sent to the CPU to temporarily stop its current tasks and execute a specific task. Types:

• Hardware Interrupt: Triggered by external devices (e.g., keyboard).
• Software Interrupt: Generated by programs (e.g., INT in assembly).
• Vectored Interrupt: Fixed address assigned to an interrupt.
• Non-Vectored Interrupt: Address must be provided externally.

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12. Differentiate Between RISC and CISC.

Feature	RISC	CISC
Instructions	Simple and few	Complex and many
Execution Speed	Faster	Slower
Code Size	Larger	Smaller

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13. What is DMA? Explain with a Diagram.

Direct Memory Access (DMA): A method where peripherals transfer data directly to/from memory without CPU involvement.

Functioning:

1. DMA controller requests control of the system bus.
2. Data transfer occurs directly between memory and I/O devices.
3. CPU resumes once DMA transfer completes.

(Diagram omitted for text-only format.)

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14. Differentiate Between Direct and Indirect Addressing.

Feature	Direct Addressing	Indirect Addressing
Addressing Method	Address is specified directly in the instruction.	Address is stored in a register or memory location.
Example	MOV A, 5000H	MOV A, @R0

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15. Explain Subroutine in Assembly Language.

A subroutine is a reusable code block that performs a specific task. It is invoked using instructions like CALL and returns to the main program using RET.

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16. Discuss in Brief:

a) General Register Organization: Refers to the arrangement of multiple general-purpose registers for arithmetic, logic, and data manipulation.
b) Index Register: Holds addresses for indexed addressing mode, allowing efficient array operations.
c) Input/Output Processor (IOP): A dedicated processor for managing I/O operations independently of the CPU.

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17. Draw and Explain the Architecture of 8085 Microprocessor.

(Diagram omitted for text-only format.)
Explanation:

• 8085 is an 8-bit microprocessor with a 16-bit address bus.
• Key components include: Accumulator, ALU, General-purpose registers, Instruction decoder, and control unit.

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18. Write Short Notes:

a) Array Processor: Specialized for parallel computations in vector and matrix operations.
b) Parallel Processor: Executes multiple instructions simultaneously to improve performance.
c) Floating Point Representation: Represents real numbers using a mantissa and an exponent.
d) Synchronous Data Transfer: Data transfer occurs with a shared clock signal.
e) Serial Communication: Data is transmitted one bit at a time over a single channel.

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19. Describe Direct Memory Access (DMA).

Direct Memory Access (DMA)

Definition:
Direct Memory Access (DMA) is a system that allows peripheral devices (such as disk drives, sound cards, or network cards) to transfer data directly to or from the main memory without involving the CPU. This improves system performance by freeing the CPU to perform other tasks while the data transfer occurs.

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How DMA Works:

1. DMA Controller (DMAC):
   A specialized hardware component called the DMA controller manages the data transfer. It acts as a mediator between the peripheral device and memory.

2. Steps in DMA Operation:

   • Request: The peripheral device sends a DMA request to the DMA controller.
   • Bus Control: Once the DMA controller gains control of the system bus, the CPU is temporarily halted (via the Bus Request and Bus Grant signals).
   • Transfer: Data is transferred directly between the device and memory.
   • Interrupt: After the transfer is complete, the DMA controller sends an interrupt signal to inform the CPU.

3. Modes of DMA Transfer:

   • Burst Mode: Transfers data in blocks. The CPU is completely halted during the transfer.
   • Cycle Stealing Mode: The DMA controller temporarily takes control of the bus for each word transfer, allowing the CPU to resume between transfers.
   • Transparent Mode: Transfers data only when the CPU is idle.

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Advantages of DMA:

• Frees the CPU from handling data transfer, allowing it to perform other tasks.
• Faster data transfer compared to CPU-mediated transfers.
• Reduces overhead and improves overall system performance.

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Disadvantages of DMA:

• Increases hardware complexity due to the DMA controller.
• May cause temporary delays in CPU execution during DMA operation.

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Diagram Explanation:

A basic DMA system includes:

1. CPU: Issues initial commands and resumes once DMA completes.
2. DMA Controller: Manages data transfer by controlling the address and data bus.
3. Peripheral Device: The source or destination of the data.
4. Memory: Data is written to or read from this location.

DMA Transfer Steps in Diagram:

1. Peripheral sends DMA request to DMA Controller.
2. DMA Controller sends Bus Request to CPU.
3. CPU grants the bus to DMA.
4. DMA transfers data directly to/from memory.
5. DMA interrupts CPU after the transfer.

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20. Draw and Explain One Stage of an ALU with Shift Capability.

Explanation for one stage of an ALU (Arithmetic Logic Unit) with shift capability, along with how it works.

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Explanation

An ALU performs arithmetic and logical operations. Adding shift capability to an ALU enables it to shift bits left or right in addition to basic operations like addition, subtraction, AND, OR, etc.

Components of One ALU Stage with Shift Capability:

1. Multiplexer (MUX): Selects the operation to be performed (arithmetic, logical, or shift).
2. Full Adder: Performs arithmetic operations such as addition or subtraction.
3. Logic Circuit: Handles logical operations like AND, OR, XOR, etc.
4. Shifter Unit: Performs bitwise left or right shifts.
5. Control Signals: Control lines specify the operation to be performed.

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Micro-operations Performed

1. Arithmetic Operations: Using a full adder (e.g., $A + B$, $A - B$).
2. Logical Operations: AND, OR, NOT, XOR, etc.
3. Shift Operations:
   • Left Shift (e.g., $A \times 2$): Moves bits to the left, introducing a 0 on the right.
   • Right Shift (e.g., $A \div 2$): Moves bits to the right, with either 0 or sign bit filling the leftmost position.

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Diagram (Text-based Description)

Here’s what the structure would look like:

1. Input A and B: These are the operands provided to the ALU.
2. MUX 1: Selects between Arithmetic (Adder) or Logical (Logic Circuit) operations.
3. MUX 2: Selects between the output of MUX 1 or the Shifter Unit.
4. Shifter: Takes input from A (or ALU output) and performs left or right shifts.
5. Output: The final result from the selected operation.

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Control Signals for Operations

• 000: Perform addition using the Full Adder.
• 001: Perform subtraction using the Full Adder.
• 010: Perform AND operation using the Logic Circuit.
• 011: Perform OR operation using the Logic Circuit.
• 100: Perform Left Shift using the Shifter.
• 101: Perform Right Shift using the Shifter.

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